p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 1 6 0 v n - c hannel enhancement mode mosfet v oltage 6 0 v c urrent 4.0 a sot - 2 2 3 f eatures ? r ds(on) , v gs @10v,i d @ 3.0 a< 100 m ? r ds(on) , v gs @ 4.5 v,i d @ 2.0 a< 110 m ? advanced trench process technology ? high density cell design for ultra low on - resistance ? lead free in compliance wit h eu rohs 2011/65/eu directive . ? green molding compound as per iec61249 std. (halogen free) m echanical data ? case : sot - 223 package ? terminals : solderable per mil - std - 750, method 2026 ? approx. weight : 0.043 ounces, 0.123 grams ? marking : w4n06 a m aximum r atings and t hermal c haracteristics (t a =25 o c unless otherwise noted) parameter symbol limit units drain - source voltage v ds 60 v gate - source voltage v gs + 2 0 v continuous drain current t a =25 o c i d 4 a t a = 70 o c 3.2 pulsed drain current (note 1 ) i dm 8 a power dissipation t a =25 o c p d 3.1 w t a = 70 o c 2 operating junction and storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient (note 5 ) r ja 40 .3 o c /w ? limited only by maximum junction temperature 1
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage bv dss v gs =0v,i d =250ua 6 0 - - v gate threshold voltage v gs(th) v ds =v gs ,i d =250ua 1. 0 1.86 2.5 v drain - source on - state resistance r ds(on) v gs =10v,i d = 3.0 a - 8 5 100 m gs = 4.5 v,i d = 2.0 a - 9 5 110 zero gate voltage drain current i dss v ds = 48 v,v gs =0v - - 1 .0 ua gate - source leakage current i gss v gs = + 2 0v,v ds =0v - - + 100 na dynamic (note 6 ) total gate charge q g v ds = 48 v, i d = 3 a, v gs = 4.5 v (note 2,3 ) - 5.1 - nc gate - source charge q gs - 1. 2 - gate - drain charge q gd - 1. 9 - input capacitance ciss v ds = 15 v, v gs =0v, f=1.0mhz - 509 - pf output capacitance coss - 39 - reverse transfer capacitance crss - 26 - turn - on delay time td (on) v dd = 30 v, i d = 3 a, v gs = 10 v, r g = 3.3 (note 2,3 ) - 1 .6 - ns turn - on rise time t r - 7.3 - turn - off delay time td (off) - 2 5 - turn - off fall time t f - 1 4 - drain - source diode maximum continuous drain - source diode forward current i s --- - - 4 a diode forward voltage v sd i s = 1 a,v gs =0v - 0. 8 1.2 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics 3. repetitive rating, pulse width limited by junction temperature tj(max)=150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. 4. the maximum current rating i s package limited 5. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. m ount ed on a 1 inch 2 with 2oz. square pad of copper . 6. guaranteed by design, not subject to product ion testing
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 3 t ypical characteristic curves fig.1 output characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 source - drain diode forward voltage
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 4 t ypical characteristic curves fig. 7 gate - charge characteristics fig. 8 breakdown voltage variation vs. temperature fig. 9 threshold voltage variation with temperature fig. 10 capacitance vs. drain - source voltage fig. 11 maximum safe operating area
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 5 t ypical characteristic curves fig. 12 normalized transient thermal impedance vs. pulse width
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 6 packaging information . sot - 223 dimension u nit: mm
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 7 part no packing code version mounting pad layout part n o packing code package type packing type marking ver sion pj w4n06a _ r2 _00001 sot - 223 2,500pcs / 13
p p j w4 n 06 a j uly 7 ,201 5 - rev.0 0 page 8 disclaimer
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